MATES register enumeration. Used to access MATES registers (both integral and floating point).
| Enumerator |
|---|
| REG_COMMON_TEST |
(0) TEST (#0x0, RWN, init.: 0xFF, min.: 0x0, max.: 0xFFFFFFFF) - Used for internal testing, do not use.
|
| REG_COMMON_DIR |
(1) DIR (#0x1, RO, init.: 0x0) - Device identification register
|
| REG_COMMON_BIR |
(2) BIR (#0x2, RO, init.: 0x0) - Boot loader identification register
|
| REG_COMMON_FIR |
(3) FIR (#0x3, RO, init.: 0x0) - Firmware identification register
|
| REG_COMMON_SR |
(4) SR (#0x4, RO, init.: 0x0) - Status register
|
| REG_COMMON_CR |
(5) CR (#0x5, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Control register
|
| REG_COMMON_TUT |
(6) TUT (#0x6, RO, init.: 0x0) - Total up time register
|
| REG_COMMON_CUT |
(7) CUT (#0x7, RO, init.: 0x0) - Current up time register
|
| REG_COMMON_FUT |
(8) FUT (#0x8, RO, init.: 0x0) - Firmware up time register
|
| REG_COMMON_DPD |
(9) DPD (#0x9, RO, init.: 0x0) - Device production date register
|
| REG_COMMON_PUC |
(10) PUC (#0xA, RO, init.: 0x0) - Power up counter register
|
| REG_COMMON_HIR |
(11) HIR (#0xB, RO, init.: 0x0) - Hardware identification register
|
| REG_COMMON_CAPS01 |
(12) CAPS01 (#0xC, RO, init.: 0x0) - Device capabilities register #1
|
| REG_COMMON_CAPS02 |
(13) CAPS02 (#0xD, RO, init.: 0x0) - Device capabilities register #2
|
| REG_MATES_DIO3_MK1_ODEF |
(512) ODEF (#0x200, RWN, init.: 0x0, min.: 0x0, max.: 0x800FFFFF) - Outputs default value register
|
| REG_MATES_DIO3_MK1_ODIS |
(513) ODIS (#0x201, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFF) - Outputs disable register
|
| REG_MATES_DIO3_MK1_PRD01 |
(514) PRD01 (#0x202, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 01 period register
|
| REG_MATES_DIO3_MK1_PRD02 |
(515) PRD02 (#0x203, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 02 period register
|
| REG_MATES_DIO3_MK1_PRD03 |
(516) PRD03 (#0x204, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 03 period register
|
| REG_MATES_DIO3_MK1_PRD04 |
(517) PRD04 (#0x205, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 04 period register
|
| REG_MATES_DIO3_MK1_PRD05 |
(518) PRD05 (#0x206, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 05 period register
|
| REG_MATES_DIO3_MK1_PRD06 |
(519) PRD06 (#0x207, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 06 period register
|
| REG_MATES_DIO3_MK1_PRD07 |
(520) PRD07 (#0x208, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 07 period register
|
| REG_MATES_DIO3_MK1_PRD08 |
(521) PRD08 (#0x209, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 08 period register
|
| REG_MATES_DIO3_MK1_PRD09 |
(522) PRD09 (#0x20A, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 09 period register
|
| REG_MATES_DIO3_MK1_PRD10 |
(523) PRD10 (#0x20B, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 10 period register
|
| REG_MATES_DIO3_MK1_PRD11 |
(524) PRD11 (#0x20C, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 11 period register
|
| REG_MATES_DIO3_MK1_PRD12 |
(525) PRD12 (#0x20D, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 12 period register
|
| REG_MATES_DIO3_MK1_PRD13 |
(526) PRD13 (#0x20E, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 13 period register
|
| REG_MATES_DIO3_MK1_PRD14 |
(527) PRD14 (#0x20F, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 14 period register
|
| REG_MATES_DIO3_MK1_PRD15 |
(528) PRD15 (#0x210, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 15 period register
|
| REG_MATES_DIO3_MK1_PRD16 |
(529) PRD16 (#0x211, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 16 period register
|
| REG_MATES_DIO3_MK1_PRD17 |
(530) PRD17 (#0x212, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 17 period register
|
| REG_MATES_DIO3_MK1_PRD18 |
(531) PRD18 (#0x213, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 18 period register
|
| REG_MATES_DIO3_MK1_PRD19 |
(532) PRD19 (#0x214, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 19 period register
|
| REG_MATES_DIO3_MK1_PRD20 |
(533) PRD20 (#0x215, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 20 period register
|
| REG_MATES_DIO3_MK1_TRISE01 |
(534) TRISE01 (#0x216, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 01 rise time register
|
| REG_MATES_DIO3_MK1_TRISE02 |
(535) TRISE02 (#0x217, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 02 rise time register
|
| REG_MATES_DIO3_MK1_TRISE03 |
(536) TRISE03 (#0x218, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 03 rise time register
|
| REG_MATES_DIO3_MK1_TRISE04 |
(537) TRISE04 (#0x219, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 04 rise time register
|
| REG_MATES_DIO3_MK1_TRISE05 |
(538) TRISE05 (#0x21A, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 05 rise time register
|
| REG_MATES_DIO3_MK1_TRISE06 |
(539) TRISE06 (#0x21B, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 06 rise time register
|
| REG_MATES_DIO3_MK1_TRISE07 |
(540) TRISE07 (#0x21C, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 07 rise time register
|
| REG_MATES_DIO3_MK1_TRISE08 |
(541) TRISE08 (#0x21D, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 08 rise time register
|
| REG_MATES_DIO3_MK1_TRISE09 |
(542) TRISE09 (#0x21E, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 09 rise time register
|
| REG_MATES_DIO3_MK1_TRISE10 |
(543) TRISE10 (#0x21F, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 10 rise time register
|
| REG_MATES_DIO3_MK1_TRISE11 |
(544) TRISE11 (#0x220, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 11 rise time register
|
| REG_MATES_DIO3_MK1_TRISE12 |
(545) TRISE12 (#0x221, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 12 rise time register
|
| REG_MATES_DIO3_MK1_TRISE13 |
(546) TRISE13 (#0x222, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 13 rise time register
|
| REG_MATES_DIO3_MK1_TRISE14 |
(547) TRISE14 (#0x223, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 14 rise time register
|
| REG_MATES_DIO3_MK1_TRISE15 |
(548) TRISE15 (#0x224, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 15 rise time register
|
| REG_MATES_DIO3_MK1_TRISE16 |
(549) TRISE16 (#0x225, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 16 rise time register
|
| REG_MATES_DIO3_MK1_TRISE17 |
(550) TRISE17 (#0x226, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 17 rise time register
|
| REG_MATES_DIO3_MK1_TRISE18 |
(551) TRISE18 (#0x227, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 18 rise time register
|
| REG_MATES_DIO3_MK1_TRISE19 |
(552) TRISE19 (#0x228, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 19 rise time register
|
| REG_MATES_DIO3_MK1_TRISE20 |
(553) TRISE20 (#0x229, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 20 rise time register
|
| REG_MATES_DIO3_MK1_TFALL01 |
(554) TFALL01 (#0x22A, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 01 fall time register
|
| REG_MATES_DIO3_MK1_TFALL02 |
(555) TFALL02 (#0x22B, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 02 fall time register
|
| REG_MATES_DIO3_MK1_TFALL03 |
(556) TFALL03 (#0x22C, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 03 fall time register
|
| REG_MATES_DIO3_MK1_TFALL04 |
(557) TFALL04 (#0x22D, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 04 fall time register
|
| REG_MATES_DIO3_MK1_TFALL05 |
(558) TFALL05 (#0x22E, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 05 fall time register
|
| REG_MATES_DIO3_MK1_TFALL06 |
(559) TFALL06 (#0x22F, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 06 fall time register
|
| REG_MATES_DIO3_MK1_TFALL07 |
(560) TFALL07 (#0x230, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 07 fall time register
|
| REG_MATES_DIO3_MK1_TFALL08 |
(561) TFALL08 (#0x231, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 08 fall time register
|
| REG_MATES_DIO3_MK1_TFALL09 |
(562) TFALL09 (#0x232, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 09 fall time register
|
| REG_MATES_DIO3_MK1_TFALL10 |
(563) TFALL10 (#0x233, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 10 fall time register
|
| REG_MATES_DIO3_MK1_TFALL11 |
(564) TFALL11 (#0x234, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 11 fall time register
|
| REG_MATES_DIO3_MK1_TFALL12 |
(565) TFALL12 (#0x235, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 12 fall time register
|
| REG_MATES_DIO3_MK1_TFALL13 |
(566) TFALL13 (#0x236, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 13 fall time register
|
| REG_MATES_DIO3_MK1_TFALL14 |
(567) TFALL14 (#0x237, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 14 fall time register
|
| REG_MATES_DIO3_MK1_TFALL15 |
(568) TFALL15 (#0x238, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 15 fall time register
|
| REG_MATES_DIO3_MK1_TFALL16 |
(569) TFALL16 (#0x239, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 16 fall time register
|
| REG_MATES_DIO3_MK1_TFALL17 |
(570) TFALL17 (#0x23A, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 17 fall time register
|
| REG_MATES_DIO3_MK1_TFALL18 |
(571) TFALL18 (#0x23B, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 18 fall time register
|
| REG_MATES_DIO3_MK1_TFALL19 |
(572) TFALL19 (#0x23C, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 19 fall time register
|
| REG_MATES_DIO3_MK1_TFALL20 |
(573) TFALL20 (#0x23D, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 20 fall time register
|
| REG_MATES_DIO3_MK1_ORP |
(574) ORP (#0x23E, RWN, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Outputs restore period
|
| REG_MATES_DIO3_MK1_ORRT |
(575) ORRT (#0x23F, RO, init.: 0x0) - Outptus restore remaining time register
|
| REG_MATES_DIO3_MK1_PSEL |
(576) PSEL (#0x240, RWN, init.: 0x0, min.: 0x0, max.: 0xFFFFF) - Pull-up / pull-down selection register
|
| REG_MATES_DIO3_MK1_CANID |
(577) CANID (#0x241, RWN, init.: 20, min.: 20, max.: 29) - The node's CAN ID / address register
|
| REG_MATES_DAC5_MK1_DEF01 |
(1280) DEF01 (#0x500, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT01 default voltage register
|
| REG_MATES_DAC5_MK1_DEF02 |
(1281) DEF02 (#0x501, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT02 default voltage register
|
| REG_MATES_DAC5_MK1_DEF03 |
(1282) DEF03 (#0x502, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT03 default voltage register
|
| REG_MATES_DAC5_MK1_DEF04 |
(1283) DEF04 (#0x503, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT04 default voltage register
|
| REG_MATES_DAC5_MK1_DEF05 |
(1284) DEF05 (#0x504, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT05 default voltage register
|
| REG_MATES_DAC5_MK1_DEF06 |
(1285) DEF06 (#0x505, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT06 default voltage register
|
| REG_MATES_DAC5_MK1_DEF07 |
(1286) DEF07 (#0x506, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT07 default voltage register
|
| REG_MATES_DAC5_MK1_DEF08 |
(1287) DEF08 (#0x507, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT08 default voltage register
|
| REG_MATES_DAC5_MK1_DEF09 |
(1288) DEF09 (#0x508, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT09 default voltage register
|
| REG_MATES_DAC5_MK1_DEF10 |
(1289) DEF10 (#0x509, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT10 default voltage register
|
| REG_MATES_DAC5_MK1_DEF11 |
(1290) DEF11 (#0x50A, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT11 default voltage register
|
| REG_MATES_DAC5_MK1_DEF12 |
(1291) DEF12 (#0x50B, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT12 default voltage register
|
| REG_MATES_DAC5_MK1_DEF13 |
(1292) DEF13 (#0x50C, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT13 default voltage register
|
| REG_MATES_DAC5_MK1_DEF14 |
(1293) DEF14 (#0x50D, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT14 default voltage register
|
| REG_MATES_DAC5_MK1_DEF15 |
(1294) DEF15 (#0x50E, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT15 default voltage register
|
| REG_MATES_DAC5_MK1_DEF16 |
(1295) DEF16 (#0x50F, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT16 default voltage register
|
| REG_MATES_DAC5_MK1_DEF17 |
(1296) DEF17 (#0x510, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT17 default voltage register
|
| REG_MATES_DAC5_MK1_DEF18 |
(1297) DEF18 (#0x511, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT18 default voltage register
|
| REG_MATES_DAC5_MK1_DEF19 |
(1298) DEF19 (#0x512, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT19 default voltage register
|
| REG_MATES_DAC5_MK1_DEF20 |
(1299) DEF20 (#0x513, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT20 default voltage register
|
| REG_MATES_DAC5_MK1_DEF21 |
(1300) DEF21 (#0x514, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT21 default voltage register
|
| REG_MATES_DAC5_MK1_DEF22 |
(1301) DEF22 (#0x515, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT22 default voltage register
|
| REG_MATES_DAC5_MK1_DEF23 |
(1302) DEF23 (#0x516, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT23 default voltage register
|
| REG_MATES_DAC5_MK1_DEF24 |
(1303) DEF24 (#0x517, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT24 default voltage register
|
| REG_MATES_DAC5_MK1_DEF25 |
(1304) DEF25 (#0x518, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT25 default voltage register
|
| REG_MATES_DAC5_MK1_DEF26 |
(1305) DEF26 (#0x519, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT26 default voltage register
|
| REG_MATES_DAC5_MK1_DEF27 |
(1306) DEF27 (#0x51A, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT27 default voltage register
|
| REG_MATES_DAC5_MK1_DEF28 |
(1307) DEF28 (#0x51B, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT28 default voltage register
|
| REG_MATES_DAC5_MK1_DEF29 |
(1308) DEF29 (#0x51C, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT29 default voltage register
|
| REG_MATES_DAC5_MK1_DEF30 |
(1309) DEF30 (#0x51D, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT30 default voltage register
|
| REG_MATES_DAC5_MK1_DEF31 |
(1310) DEF31 (#0x51E, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT31 default voltage register
|
| REG_MATES_DAC5_MK1_DEF32 |
(1311) DEF32 (#0x51F, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT32 default voltage register
|
| REG_MATES_DAC5_MK1_DEF33 |
(1312) DEF33 (#0x520, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT33 default voltage register
|
| REG_MATES_DAC5_MK1_DEF34 |
(1313) DEF34 (#0x521, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT34 default voltage register
|
| REG_MATES_DAC5_MK1_DEF35 |
(1314) DEF35 (#0x522, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT35 default voltage register
|
| REG_MATES_DAC5_MK1_DEF36 |
(1315) DEF36 (#0x523, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT36 default voltage register
|
| REG_MATES_DAC5_MK1_DEF37 |
(1316) DEF37 (#0x524, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT37 default voltage register
|
| REG_MATES_DAC5_MK1_DEF38 |
(1317) DEF38 (#0x525, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT38 default voltage register
|
| REG_MATES_DAC5_MK1_DEF39 |
(1318) DEF39 (#0x526, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT39 default voltage register
|
| REG_MATES_DAC5_MK1_DEF40 |
(1319) DEF40 (#0x527, RWN, init.: 0.1, min.: 0.0, max.: 5.0) - OUT40 default voltage register
|
| REG_MATES_DAC5_MK1_MIN01 |
(1320) MIN01 (#0x528, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT01 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN02 |
(1321) MIN02 (#0x529, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT02 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN03 |
(1322) MIN03 (#0x52A, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT03 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN04 |
(1323) MIN04 (#0x52B, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT04 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN05 |
(1324) MIN05 (#0x52C, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT05 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN06 |
(1325) MIN06 (#0x52D, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT06 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN07 |
(1326) MIN07 (#0x52E, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT07 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN08 |
(1327) MIN08 (#0x52F, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT08 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN09 |
(1328) MIN09 (#0x530, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT09 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN10 |
(1329) MIN10 (#0x531, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT10 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN11 |
(1330) MIN11 (#0x532, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT11 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN12 |
(1331) MIN12 (#0x533, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT12 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN13 |
(1332) MIN13 (#0x534, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT13 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN14 |
(1333) MIN14 (#0x535, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT14 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN15 |
(1334) MIN15 (#0x536, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT15 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN16 |
(1335) MIN16 (#0x537, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT16 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN17 |
(1336) MIN17 (#0x538, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT17 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN18 |
(1337) MIN18 (#0x539, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT18 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN19 |
(1338) MIN19 (#0x53A, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT19 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN20 |
(1339) MIN20 (#0x53B, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT20 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN21 |
(1340) MIN21 (#0x53C, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT21 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN22 |
(1341) MIN22 (#0x53D, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT22 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN23 |
(1342) MIN23 (#0x53E, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT23 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN24 |
(1343) MIN24 (#0x53F, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT24 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN25 |
(1344) MIN25 (#0x540, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT25 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN26 |
(1345) MIN26 (#0x541, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT26 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN27 |
(1346) MIN27 (#0x542, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT27 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN28 |
(1347) MIN28 (#0x543, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT28 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN29 |
(1348) MIN29 (#0x544, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT29 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN30 |
(1349) MIN30 (#0x545, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT30 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN31 |
(1350) MIN31 (#0x546, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT31 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN32 |
(1351) MIN32 (#0x547, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT32 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN33 |
(1352) MIN33 (#0x548, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT33 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN34 |
(1353) MIN34 (#0x549, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT34 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN35 |
(1354) MIN35 (#0x54A, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT35 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN36 |
(1355) MIN36 (#0x54B, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT36 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN37 |
(1356) MIN37 (#0x54C, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT37 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN38 |
(1357) MIN38 (#0x54D, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT38 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN39 |
(1358) MIN39 (#0x54E, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT39 minimum voltage register
|
| REG_MATES_DAC5_MK1_MIN40 |
(1359) MIN40 (#0x54F, RWN, init.: 0.0, min.: 0.0, max.: 5.0) - OUT40 minimum voltage register
|
| REG_MATES_DAC5_MK1_MAX01 |
(1360) MAX01 (#0x550, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT01 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX02 |
(1361) MAX02 (#0x551, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT02 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX03 |
(1362) MAX03 (#0x552, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT03 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX04 |
(1363) MAX04 (#0x553, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT04 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX05 |
(1364) MAX05 (#0x554, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT05 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX06 |
(1365) MAX06 (#0x555, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT06 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX07 |
(1366) MAX07 (#0x556, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT07 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX08 |
(1367) MAX08 (#0x557, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT08 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX09 |
(1368) MAX09 (#0x558, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT09 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX10 |
(1369) MAX10 (#0x559, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT10 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX11 |
(1370) MAX11 (#0x55A, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT11 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX12 |
(1371) MAX12 (#0x55B, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT12 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX13 |
(1372) MAX13 (#0x55C, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT13 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX14 |
(1373) MAX14 (#0x55D, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT14 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX15 |
(1374) MAX15 (#0x55E, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT15 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX16 |
(1375) MAX16 (#0x55F, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT16 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX17 |
(1376) MAX17 (#0x560, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT17 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX18 |
(1377) MAX18 (#0x561, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT18 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX19 |
(1378) MAX19 (#0x562, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT19 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX20 |
(1379) MAX20 (#0x563, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT20 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX21 |
(1380) MAX21 (#0x564, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT21 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX22 |
(1381) MAX22 (#0x565, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT22 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX23 |
(1382) MAX23 (#0x566, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT23 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX24 |
(1383) MAX24 (#0x567, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT24 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX25 |
(1384) MAX25 (#0x568, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT25 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX26 |
(1385) MAX26 (#0x569, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT26 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX27 |
(1386) MAX27 (#0x56A, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT27 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX28 |
(1387) MAX28 (#0x56B, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT28 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX29 |
(1388) MAX29 (#0x56C, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT29 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX30 |
(1389) MAX30 (#0x56D, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT30 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX31 |
(1390) MAX31 (#0x56E, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT31 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX32 |
(1391) MAX32 (#0x56F, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT32 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX33 |
(1392) MAX33 (#0x570, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT33 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX34 |
(1393) MAX34 (#0x571, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT34 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX35 |
(1394) MAX35 (#0x572, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT35 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX36 |
(1395) MAX36 (#0x573, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT36 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX37 |
(1396) MAX37 (#0x574, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT37 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX38 |
(1397) MAX38 (#0x575, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT38 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX39 |
(1398) MAX39 (#0x576, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT39 maximum voltage register
|
| REG_MATES_DAC5_MK1_MAX40 |
(1399) MAX40 (#0x577, RWN, init.: 3.0, min.: 0.0, max.: 5.0) - OUT40 maximum voltage register
|
| REG_MATES_DAC5_MK1_COF01 |
(1400) COF01 (#0x578, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT01 calibration offset register
|
| REG_MATES_DAC5_MK1_COF02 |
(1401) COF02 (#0x579, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT02 calibration offset register
|
| REG_MATES_DAC5_MK1_COF03 |
(1402) COF03 (#0x57A, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT03 calibration offset register
|
| REG_MATES_DAC5_MK1_COF04 |
(1403) COF04 (#0x57B, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT04 calibration offset register
|
| REG_MATES_DAC5_MK1_COF05 |
(1404) COF05 (#0x57C, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT05 calibration offset register
|
| REG_MATES_DAC5_MK1_COF06 |
(1405) COF06 (#0x57D, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT06 calibration offset register
|
| REG_MATES_DAC5_MK1_COF07 |
(1406) COF07 (#0x57E, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT07 calibration offset register
|
| REG_MATES_DAC5_MK1_COF08 |
(1407) COF08 (#0x57F, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT08 calibration offset register
|
| REG_MATES_DAC5_MK1_COF09 |
(1408) COF09 (#0x580, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT09 calibration offset register
|
| REG_MATES_DAC5_MK1_COF10 |
(1409) COF10 (#0x581, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT10 calibration offset register
|
| REG_MATES_DAC5_MK1_COF11 |
(1410) COF11 (#0x582, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT11 calibration offset register
|
| REG_MATES_DAC5_MK1_COF12 |
(1411) COF12 (#0x583, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT12 calibration offset register
|
| REG_MATES_DAC5_MK1_COF13 |
(1412) COF13 (#0x584, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT13 calibration offset register
|
| REG_MATES_DAC5_MK1_COF14 |
(1413) COF14 (#0x585, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT14 calibration offset register
|
| REG_MATES_DAC5_MK1_COF15 |
(1414) COF15 (#0x586, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT15 calibration offset register
|
| REG_MATES_DAC5_MK1_COF16 |
(1415) COF16 (#0x587, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT16 calibration offset register
|
| REG_MATES_DAC5_MK1_COF17 |
(1416) COF17 (#0x588, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT17 calibration offset register
|
| REG_MATES_DAC5_MK1_COF18 |
(1417) COF18 (#0x589, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT18 calibration offset register
|
| REG_MATES_DAC5_MK1_COF19 |
(1418) COF19 (#0x58A, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT19 calibration offset register
|
| REG_MATES_DAC5_MK1_COF20 |
(1419) COF20 (#0x58B, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT20 calibration offset register
|
| REG_MATES_DAC5_MK1_COF21 |
(1420) COF21 (#0x58C, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT21 calibration offset register
|
| REG_MATES_DAC5_MK1_COF22 |
(1421) COF22 (#0x58D, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT22 calibration offset register
|
| REG_MATES_DAC5_MK1_COF23 |
(1422) COF23 (#0x58E, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT23 calibration offset register
|
| REG_MATES_DAC5_MK1_COF24 |
(1423) COF24 (#0x58F, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT24 calibration offset register
|
| REG_MATES_DAC5_MK1_COF25 |
(1424) COF25 (#0x590, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT25 calibration offset register
|
| REG_MATES_DAC5_MK1_COF26 |
(1425) COF26 (#0x591, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT26 calibration offset register
|
| REG_MATES_DAC5_MK1_COF27 |
(1426) COF27 (#0x592, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT27 calibration offset register
|
| REG_MATES_DAC5_MK1_COF28 |
(1427) COF28 (#0x593, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT28 calibration offset register
|
| REG_MATES_DAC5_MK1_COF29 |
(1428) COF29 (#0x594, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT29 calibration offset register
|
| REG_MATES_DAC5_MK1_COF30 |
(1429) COF30 (#0x595, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT30 calibration offset register
|
| REG_MATES_DAC5_MK1_COF31 |
(1430) COF31 (#0x596, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT31 calibration offset register
|
| REG_MATES_DAC5_MK1_COF32 |
(1431) COF32 (#0x597, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT32 calibration offset register
|
| REG_MATES_DAC5_MK1_COF33 |
(1432) COF33 (#0x598, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT33 calibration offset register
|
| REG_MATES_DAC5_MK1_COF34 |
(1433) COF34 (#0x599, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT34 calibration offset register
|
| REG_MATES_DAC5_MK1_COF35 |
(1434) COF35 (#0x59A, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT35 calibration offset register
|
| REG_MATES_DAC5_MK1_COF36 |
(1435) COF36 (#0x59B, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT36 calibration offset register
|
| REG_MATES_DAC5_MK1_COF37 |
(1436) COF37 (#0x59C, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT37 calibration offset register
|
| REG_MATES_DAC5_MK1_COF38 |
(1437) COF38 (#0x59D, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT38 calibration offset register
|
| REG_MATES_DAC5_MK1_COF39 |
(1438) COF39 (#0x59E, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT39 calibration offset register
|
| REG_MATES_DAC5_MK1_COF40 |
(1439) COF40 (#0x59F, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - OUT40 calibration offset register
|
| REG_MATES_DAC5_MK1_CGA01 |
(1440) CGA01 (#0x5A0, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT01 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA02 |
(1441) CGA02 (#0x5A1, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT02 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA03 |
(1442) CGA03 (#0x5A2, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT03 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA04 |
(1443) CGA04 (#0x5A3, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT04 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA05 |
(1444) CGA05 (#0x5A4, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT05 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA06 |
(1445) CGA06 (#0x5A5, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT06 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA07 |
(1446) CGA07 (#0x5A6, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT07 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA08 |
(1447) CGA08 (#0x5A7, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT08 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA09 |
(1448) CGA09 (#0x5A8, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT09 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA10 |
(1449) CGA10 (#0x5A9, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT10 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA11 |
(1450) CGA11 (#0x5AA, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT11 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA12 |
(1451) CGA12 (#0x5AB, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT12 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA13 |
(1452) CGA13 (#0x5AC, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT13 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA14 |
(1453) CGA14 (#0x5AD, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT14 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA15 |
(1454) CGA15 (#0x5AE, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT15 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA16 |
(1455) CGA16 (#0x5AF, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT16 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA17 |
(1456) CGA17 (#0x5B0, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT17 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA18 |
(1457) CGA18 (#0x5B1, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT18 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA19 |
(1458) CGA19 (#0x5B2, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT19 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA20 |
(1459) CGA20 (#0x5B3, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT20 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA21 |
(1460) CGA21 (#0x5B4, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT21 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA22 |
(1461) CGA22 (#0x5B5, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT22 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA23 |
(1462) CGA23 (#0x5B6, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT23 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA24 |
(1463) CGA24 (#0x5B7, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT24 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA25 |
(1464) CGA25 (#0x5B8, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT25 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA26 |
(1465) CGA26 (#0x5B9, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT26 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA27 |
(1466) CGA27 (#0x5BA, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT27 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA28 |
(1467) CGA28 (#0x5BB, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT28 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA29 |
(1468) CGA29 (#0x5BC, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT29 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA30 |
(1469) CGA30 (#0x5BD, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT30 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA31 |
(1470) CGA31 (#0x5BE, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT31 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA32 |
(1471) CGA32 (#0x5BF, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT32 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA33 |
(1472) CGA33 (#0x5C0, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT33 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA34 |
(1473) CGA34 (#0x5C1, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT34 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA35 |
(1474) CGA35 (#0x5C2, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT35 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA36 |
(1475) CGA36 (#0x5C3, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT36 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA37 |
(1476) CGA37 (#0x5C4, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT37 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA38 |
(1477) CGA38 (#0x5C5, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT38 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA39 |
(1478) CGA39 (#0x5C6, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT39 calibration gain register
|
| REG_MATES_DAC5_MK1_CGA40 |
(1479) CGA40 (#0x5C7, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - OUT40 calibration gain register
|
| REG_MATES_DAC5_MK1_BMIN |
(1480) BMIN (#0x5C8, RWN, init.: 0x0, min.: 0x0, max.: 0xFFFF) - Minimum binary DAC code for all channels register
|
| REG_MATES_DAC5_MK1_BMAX |
(1481) BMAX (#0x5C9, RWN, init.: 0x9A00, min.: 0x0, max.: 0xFFFF) - Maximum binary DAC code for all channels register
|
| REG_MATES_DAC5_MK1_LCT |
(1482) LCT (#0x5CA, RWN, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Last calibration time register
|
| REG_MATES_DAC5_MK1_CANID |
(1483) CANID (#0x5CB, RWN, init.: 50, min.: 50, max.: 59) - The node's CAN ID / address register
|
| REG_MATES_DIOX_MK1_ODEF |
(1024) ODEF (#0x400, RWN, init.: 0xC0000000, min.: 0x0, max.: 0xC00FFFFF) - Outputs default value register.
|
| REG_MATES_DIOX_MK1_OCTRL01 |
(1025) OCTRL01 (#0x401, RWN, init.: 0x0, min.: 0x0, max.: 0x7) - OUT01 control register
|
| REG_MATES_DIOX_MK1_OCTRL02 |
(1026) OCTRL02 (#0x402, RWN, init.: 0x0, min.: 0x0, max.: 0x7) - OUT02 control register
|
| REG_MATES_DIOX_MK1_OCTRL03 |
(1027) OCTRL03 (#0x403, RWN, init.: 0x0, min.: 0x0, max.: 0x7) - OUT03 control register
|
| REG_MATES_DIOX_MK1_OCTRL04 |
(1028) OCTRL04 (#0x404, RWN, init.: 0x0, min.: 0x0, max.: 0x7) - OUT04 control register
|
| REG_MATES_DIOX_MK1_OCTRL05 |
(1029) OCTRL05 (#0x405, RWN, init.: 0x0, min.: 0x0, max.: 0x7) - OUT05 control register
|
| REG_MATES_DIOX_MK1_OCTRL06 |
(1030) OCTRL06 (#0x406, RWN, init.: 0x0, min.: 0x0, max.: 0x7) - OUT06 control register
|
| REG_MATES_DIOX_MK1_OCTRL07 |
(1031) OCTRL07 (#0x407, RWN, init.: 0x0, min.: 0x0, max.: 0x7) - OUT07 control register
|
| REG_MATES_DIOX_MK1_OCTRL08 |
(1032) OCTRL08 (#0x408, RWN, init.: 0x0, min.: 0x0, max.: 0x7) - OUT08 control register
|
| REG_MATES_DIOX_MK1_OCTRL09 |
(1033) OCTRL09 (#0x409, RWN, init.: 0x0, min.: 0x0, max.: 0x7) - OUT09 control register
|
| REG_MATES_DIOX_MK1_OCTRL10 |
(1034) OCTRL10 (#0x40A, RWN, init.: 0x0, min.: 0x0, max.: 0x7) - OUT10 control register
|
| REG_MATES_DIOX_MK1_OCTRL11 |
(1035) OCTRL11 (#0x40B, RWN, init.: 0x0, min.: 0x0, max.: 0x7) - OUT11 control register
|
| REG_MATES_DIOX_MK1_OCTRL12 |
(1036) OCTRL12 (#0x40C, RWN, init.: 0x0, min.: 0x0, max.: 0x7) - OUT12 control register
|
| REG_MATES_DIOX_MK1_OCTRL13 |
(1037) OCTRL13 (#0x40D, RWN, init.: 0x0, min.: 0x0, max.: 0x7) - OUT13 control register
|
| REG_MATES_DIOX_MK1_OCTRL14 |
(1038) OCTRL14 (#0x40E, RWN, init.: 0x0, min.: 0x0, max.: 0x7) - OUT14 control register
|
| REG_MATES_DIOX_MK1_OCTRL15 |
(1039) OCTRL15 (#0x40F, RWN, init.: 0x0, min.: 0x0, max.: 0x7) - OUT15 control register
|
| REG_MATES_DIOX_MK1_OCTRL16 |
(1040) OCTRL16 (#0x410, RWN, init.: 0x0, min.: 0x0, max.: 0x7) - OUT16 control register
|
| REG_MATES_DIOX_MK1_OCTRL17 |
(1041) OCTRL17 (#0x411, RWN, init.: 0x0, min.: 0x0, max.: 0x7) - OUT17 control register
|
| REG_MATES_DIOX_MK1_OCTRL18 |
(1042) OCTRL18 (#0x412, RWN, init.: 0x0, min.: 0x0, max.: 0x7) - OUT18 control register
|
| REG_MATES_DIOX_MK1_OCTRL19 |
(1043) OCTRL19 (#0x413, RWN, init.: 0x0, min.: 0x0, max.: 0x7) - OUT19 control register
|
| REG_MATES_DIOX_MK1_OCTRL20 |
(1044) OCTRL20 (#0x414, RWN, init.: 0x0, min.: 0x0, max.: 0x7) - OUT20 control register
|
| REG_MATES_DIOX_MK1_ORP |
(1045) ORP (#0x415, RWN, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Outputs restore period register
|
| REG_MATES_DIOX_MK1_ORRT |
(1046) ORRT (#0x416, RO, init.: 0x0) - Outptus restore remaining time register
|
| REG_MATES_DIOX_MK1_CANID |
(1047) CANID (#0x417, RWN, init.: 40, min.: 40, max.: 49) - The node's CAN ID / address register
|
| REG_MATES_ADC5_MK1_COF01 |
(1536) COF01 (#0x600, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN01 calibration offset register
|
| REG_MATES_ADC5_MK1_COF02 |
(1537) COF02 (#0x601, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN02 calibration offset register
|
| REG_MATES_ADC5_MK1_COF03 |
(1538) COF03 (#0x602, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN03 calibration offset register
|
| REG_MATES_ADC5_MK1_COF04 |
(1539) COF04 (#0x603, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN04 calibration offset register
|
| REG_MATES_ADC5_MK1_COF05 |
(1540) COF05 (#0x604, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN05 calibration offset register
|
| REG_MATES_ADC5_MK1_COF06 |
(1541) COF06 (#0x605, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN06 calibration offset register
|
| REG_MATES_ADC5_MK1_COF07 |
(1542) COF07 (#0x606, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN07 calibration offset register
|
| REG_MATES_ADC5_MK1_COF08 |
(1543) COF08 (#0x607, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN08 calibration offset register
|
| REG_MATES_ADC5_MK1_COF09 |
(1544) COF09 (#0x608, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN09 calibration offset register
|
| REG_MATES_ADC5_MK1_COF10 |
(1545) COF10 (#0x609, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN10 calibration offset register
|
| REG_MATES_ADC5_MK1_COF11 |
(1546) COF11 (#0x60A, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN11 calibration offset register
|
| REG_MATES_ADC5_MK1_COF12 |
(1547) COF12 (#0x60B, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN12 calibration offset register
|
| REG_MATES_ADC5_MK1_COF13 |
(1548) COF13 (#0x60C, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN13 calibration offset register
|
| REG_MATES_ADC5_MK1_COF14 |
(1549) COF14 (#0x60D, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN14 calibration offset register
|
| REG_MATES_ADC5_MK1_COF15 |
(1550) COF15 (#0x60E, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN15 calibration offset register
|
| REG_MATES_ADC5_MK1_COF16 |
(1551) COF16 (#0x60F, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN16 calibration offset register
|
| REG_MATES_ADC5_MK1_COF17 |
(1552) COF17 (#0x610, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN17 calibration offset register
|
| REG_MATES_ADC5_MK1_COF18 |
(1553) COF18 (#0x611, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN18 calibration offset register
|
| REG_MATES_ADC5_MK1_COF19 |
(1554) COF19 (#0x612, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN19 calibration offset register
|
| REG_MATES_ADC5_MK1_COF20 |
(1555) COF20 (#0x613, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN20 calibration offset register
|
| REG_MATES_ADC5_MK1_COF21 |
(1556) COF21 (#0x614, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN21 calibration offset register
|
| REG_MATES_ADC5_MK1_COF22 |
(1557) COF22 (#0x615, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN22 calibration offset register
|
| REG_MATES_ADC5_MK1_COF23 |
(1558) COF23 (#0x616, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN23 calibration offset register
|
| REG_MATES_ADC5_MK1_COF24 |
(1559) COF24 (#0x617, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN24 calibration offset register
|
| REG_MATES_ADC5_MK1_COF25 |
(1560) COF25 (#0x618, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN25 calibration offset register
|
| REG_MATES_ADC5_MK1_COF26 |
(1561) COF26 (#0x619, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN26 calibration offset register
|
| REG_MATES_ADC5_MK1_COF27 |
(1562) COF27 (#0x61A, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN27 calibration offset register
|
| REG_MATES_ADC5_MK1_COF28 |
(1563) COF28 (#0x61B, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN28 calibration offset register
|
| REG_MATES_ADC5_MK1_COF29 |
(1564) COF29 (#0x61C, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN29 calibration offset register
|
| REG_MATES_ADC5_MK1_COF30 |
(1565) COF30 (#0x61D, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN30 calibration offset register
|
| REG_MATES_ADC5_MK1_COF31 |
(1566) COF31 (#0x61E, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN31 calibration offset register
|
| REG_MATES_ADC5_MK1_COF32 |
(1567) COF32 (#0x61F, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN32 calibration offset register
|
| REG_MATES_ADC5_MK1_COF33 |
(1568) COF33 (#0x620, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN33 calibration offset register
|
| REG_MATES_ADC5_MK1_COF34 |
(1569) COF34 (#0x621, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN34 calibration offset register
|
| REG_MATES_ADC5_MK1_COF35 |
(1570) COF35 (#0x622, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN35 calibration offset register
|
| REG_MATES_ADC5_MK1_COF36 |
(1571) COF36 (#0x623, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN36 calibration offset register
|
| REG_MATES_ADC5_MK1_COF37 |
(1572) COF37 (#0x624, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN37 calibration offset register
|
| REG_MATES_ADC5_MK1_COF38 |
(1573) COF38 (#0x625, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN38 calibration offset register
|
| REG_MATES_ADC5_MK1_COF39 |
(1574) COF39 (#0x626, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN39 calibration offset register
|
| REG_MATES_ADC5_MK1_COF40 |
(1575) COF40 (#0x627, RWN, init.: 0.0, min.: -0.1, max.: 0.1) - IN40 calibration offset register
|
| REG_MATES_ADC5_MK1_CGA01 |
(1576) CGA01 (#0x628, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN01 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA02 |
(1577) CGA02 (#0x629, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN02 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA03 |
(1578) CGA03 (#0x62A, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN03 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA04 |
(1579) CGA04 (#0x62B, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN04 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA05 |
(1580) CGA05 (#0x62C, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN05 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA06 |
(1581) CGA06 (#0x62D, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN06 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA07 |
(1582) CGA07 (#0x62E, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN07 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA08 |
(1583) CGA08 (#0x62F, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN08 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA09 |
(1584) CGA09 (#0x630, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN09 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA10 |
(1585) CGA10 (#0x631, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN10 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA11 |
(1586) CGA11 (#0x632, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN11 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA12 |
(1587) CGA12 (#0x633, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN12 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA13 |
(1588) CGA13 (#0x634, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN13 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA14 |
(1589) CGA14 (#0x635, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN14 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA15 |
(1590) CGA15 (#0x636, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN15 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA16 |
(1591) CGA16 (#0x637, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN16 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA17 |
(1592) CGA17 (#0x638, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN17 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA18 |
(1593) CGA18 (#0x639, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN18 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA19 |
(1594) CGA19 (#0x63A, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN19 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA20 |
(1595) CGA20 (#0x63B, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN20 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA21 |
(1596) CGA21 (#0x63C, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN21 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA22 |
(1597) CGA22 (#0x63D, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN22 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA23 |
(1598) CGA23 (#0x63E, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN23 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA24 |
(1599) CGA24 (#0x63F, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN24 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA25 |
(1600) CGA25 (#0x640, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN25 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA26 |
(1601) CGA26 (#0x641, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN26 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA27 |
(1602) CGA27 (#0x642, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN27 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA28 |
(1603) CGA28 (#0x643, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN28 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA29 |
(1604) CGA29 (#0x644, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN29 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA30 |
(1605) CGA30 (#0x645, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN30 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA31 |
(1606) CGA31 (#0x646, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN31 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA32 |
(1607) CGA32 (#0x647, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN32 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA33 |
(1608) CGA33 (#0x648, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN33 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA34 |
(1609) CGA34 (#0x649, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN34 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA35 |
(1610) CGA35 (#0x64A, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN35 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA36 |
(1611) CGA36 (#0x64B, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN36 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA37 |
(1612) CGA37 (#0x64C, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN37 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA38 |
(1613) CGA38 (#0x64D, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN38 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA39 |
(1614) CGA39 (#0x64E, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN39 calibration gain register
|
| REG_MATES_ADC5_MK1_CGA40 |
(1615) CGA40 (#0x64F, RWN, init.: 1.0, min.: 0.95, max.: 1.05) - IN40 calibration gain register
|
| REG_MATES_ADC5_MK1_LCT |
(1616) LCT (#0x650, RWN, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Last calibration time register
|
| REG_MATES_ADC5_MK1_CANID |
(1617) CANID (#0x651, RWN, init.: 60, min.: 60, max.: 69) - The node's CAN ID / address register
|
| REG_MATES_UCC_MK1_ODEF |
(768) ODEF (#0x300, RWN, init.: 0x0, min.: 0x0, max.: 0xFFFFF) - Outputs default value register
|
| REG_MATES_UCC_MK1_ODIS |
(769) ODIS (#0x301, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFF) - Outputs disable register
|
| REG_MATES_UCC_MK1_PRD01 |
(770) PRD01 (#0x302, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 01 period register
|
| REG_MATES_UCC_MK1_PRD02 |
(771) PRD02 (#0x303, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 02 period register
|
| REG_MATES_UCC_MK1_PRD03 |
(772) PRD03 (#0x304, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 03 period register
|
| REG_MATES_UCC_MK1_PRD04 |
(773) PRD04 (#0x305, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 04 period register
|
| REG_MATES_UCC_MK1_PRD05 |
(774) PRD05 (#0x306, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 05 period register
|
| REG_MATES_UCC_MK1_PRD06 |
(775) PRD06 (#0x307, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 06 period register
|
| REG_MATES_UCC_MK1_PRD07 |
(776) PRD07 (#0x308, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 07 period register
|
| REG_MATES_UCC_MK1_PRD08 |
(777) PRD08 (#0x309, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 08 period register
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| REG_MATES_UCC_MK1_PRD09 |
(778) PRD09 (#0x30A, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 09 period register
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| REG_MATES_UCC_MK1_PRD10 |
(779) PRD10 (#0x30B, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 10 period register
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| REG_MATES_UCC_MK1_PRD11 |
(780) PRD11 (#0x30C, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 11 period register
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| REG_MATES_UCC_MK1_PRD12 |
(781) PRD12 (#0x30D, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 12 period register
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| REG_MATES_UCC_MK1_PRD13 |
(782) PRD13 (#0x30E, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 13 (K1) period register
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| REG_MATES_UCC_MK1_PRD14 |
(783) PRD14 (#0x30F, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 14 (K2) period register
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| REG_MATES_UCC_MK1_TRISE01 |
(784) TRISE01 (#0x310, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 01 rise time register
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| REG_MATES_UCC_MK1_TRISE02 |
(785) TRISE02 (#0x311, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 02 rise time register
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| REG_MATES_UCC_MK1_TRISE03 |
(786) TRISE03 (#0x312, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 03 rise time register
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| REG_MATES_UCC_MK1_TRISE04 |
(787) TRISE04 (#0x313, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 04 rise time register
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| REG_MATES_UCC_MK1_TRISE05 |
(788) TRISE05 (#0x314, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 05 rise time register
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| REG_MATES_UCC_MK1_TRISE06 |
(789) TRISE06 (#0x315, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 06 rise time register
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| REG_MATES_UCC_MK1_TRISE07 |
(790) TRISE07 (#0x316, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 07 rise time register
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| REG_MATES_UCC_MK1_TRISE08 |
(791) TRISE08 (#0x317, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 08 rise time register
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| REG_MATES_UCC_MK1_TRISE09 |
(792) TRISE09 (#0x318, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 09 rise time register
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| REG_MATES_UCC_MK1_TRISE10 |
(793) TRISE10 (#0x319, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 10 rise time register
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| REG_MATES_UCC_MK1_TRISE11 |
(794) TRISE11 (#0x31A, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 11 rise time register
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| REG_MATES_UCC_MK1_TRISE12 |
(795) TRISE12 (#0x31B, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 12 rise time register
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| REG_MATES_UCC_MK1_TRISE13 |
(796) TRISE13 (#0x31C, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 13 (K1) rise time register
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| REG_MATES_UCC_MK1_TRISE14 |
(797) TRISE14 (#0x31D, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 14 (K2) rise time register
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| REG_MATES_UCC_MK1_TFALL01 |
(798) TFALL01 (#0x31E, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 01 fall time register
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| REG_MATES_UCC_MK1_TFALL02 |
(799) TFALL02 (#0x31F, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 02 fall time register
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| REG_MATES_UCC_MK1_TFALL03 |
(800) TFALL03 (#0x320, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 03 fall time register
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| REG_MATES_UCC_MK1_TFALL04 |
(801) TFALL04 (#0x321, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 04 fall time register
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| REG_MATES_UCC_MK1_TFALL05 |
(802) TFALL05 (#0x322, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 05 fall time register
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| REG_MATES_UCC_MK1_TFALL06 |
(803) TFALL06 (#0x323, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 06 fall time register
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| REG_MATES_UCC_MK1_TFALL07 |
(804) TFALL07 (#0x324, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 07 fall time register
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| REG_MATES_UCC_MK1_TFALL08 |
(805) TFALL08 (#0x325, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 08 fall time register
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| REG_MATES_UCC_MK1_TFALL09 |
(806) TFALL09 (#0x326, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 09 fall time register
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| REG_MATES_UCC_MK1_TFALL10 |
(807) TFALL10 (#0x327, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 10 fall time register
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| REG_MATES_UCC_MK1_TFALL11 |
(808) TFALL11 (#0x328, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 11 fall time register
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| REG_MATES_UCC_MK1_TFALL12 |
(809) TFALL12 (#0x329, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 12 fall time register
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| REG_MATES_UCC_MK1_TFALL13 |
(810) TFALL13 (#0x32A, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 13 (K1) fall time register
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| REG_MATES_UCC_MK1_TFALL14 |
(811) TFALL14 (#0x32B, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Channel 14 (K2) fall time register
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| REG_MATES_UCC_MK1_ORP |
(812) ORP (#0x32C, RWN, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Outputs restore period
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| REG_MATES_UCC_MK1_ORRT |
(813) ORRT (#0x32D, RO, init.: 0x0) - Outptus restore remaining time register
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| REG_MATES_UCC_MK1_CANID |
(814) CANID (#0x32E, RWN, init.: 30, min.: 30, max.: 39) - The node's CAN ID / address register
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| REG_MATES_UCC_MK1_PWMD |
(815) PWMD (#0x32F, RW, init.: 0.0, min.: 0.0, max.: 1.0) - Pulse Width Modulator Duty
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| REG_MATES_UCC_MK1_ALCDB01 |
(816) ALCDB01 (#0x330, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Alphanumeric LCD display data register 1
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| REG_MATES_UCC_MK1_ALCDB02 |
(817) ALCDB02 (#0x331, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Alphanumeric LCD display data register 2
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| REG_MATES_UCC_MK1_ALCDB03 |
(818) ALCDB03 (#0x332, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Alphanumeric LCD display data register 3
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| REG_MATES_UCC_MK1_ALCDB04 |
(819) ALCDB04 (#0x333, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Alphanumeric LCD display data register 4
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| REG_MATES_UCC_MK1_ALCDB05 |
(820) ALCDB05 (#0x334, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Alphanumeric LCD display data register 5
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| REG_MATES_UCC_MK1_ALCDB06 |
(821) ALCDB06 (#0x335, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Alphanumeric LCD display data register 6
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| REG_MATES_UCC_MK1_ALCDB07 |
(822) ALCDB07 (#0x336, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Alphanumeric LCD display data register 7
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| REG_MATES_UCC_MK1_ALCDB08 |
(823) ALCDB08 (#0x337, RW, init.: 0x0, min.: 0x0, max.: 0xFFFFFFFF) - Alphanumeric LCD display data register 8
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